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Final Electrical Specifications
LT1533 Ultralow Noise 1A Switching Regulator
September 1997
FEATURES
s s s
DESCRIPTION
The LT (R)1533 is a new class of switching regulator designed to reduce conducted and radiated electromagnetic interference (EMI). Ultralow noise and EMI are achieved by providing user control of the output switch slew rates. Voltage and current slew rates can be independently programmed to optimize switcher harmonic content versus efficiency. The LT1533 can reduce high frequency harmonic power by as much as 40dB with only minor losses in efficiency. The LT1533 utilizes a dual output switch current mode architecture optimized for low noise topologies. The IC includes two 1A power switches along with all necessary oscillator, control and protection circuitry. Unique error amp circuitry can regulate both positive and negative voltages. The internal oscillator may be synchronized to an external clock for more accurate placement of switching harmonics. Protection features include cycle by cycle short-circuit protection, undervoltage lockout and thermal shutdown. Low minimum supply voltage and low supply current during shutdown make the LT1533 well suited for portable applications. The part may also be forced into a 50% duty cycle mode for unregulated applications. The LT1533 is available in the 16-pin narrow SO package.
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Greatly Reduced Conducted and Radiated EMI (<60VP-P in Typical Application) Low Switching Harmonic Content Independent Control of Switch Voltage and Current Slew Rates Two 1A Current Limited Power Switches Regulates Positive and Negative Voltages 20kHz to 250kHz Oscillator Frequency Easily Synchronized to External Clock Wide Input Voltage Range: 2.7V to 23V Low Shutdown Current: 12A Typical Easier Layout than with Conventional Switchers Outputs Can Be Forced to 50% Duty Cycle for Unregulated Applications
APPLICATIONS
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Precision Instrumentation Systems Isolated Supplies for Industrial Automation Medical Instruments Wireless Communications Single Board Data Acquisition Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
Low Noise 5V to 12V Forward Push-Pull DC/DC Converter
5V DS1 T1* 1N4148 10 : 36 COL A COL B PGND LT1533 RVSL RCSL 10 CVC 0.01F VC GND 9 NFB 8 FB 2 15 Note 1 16 13 12 7 R2 2.49k 1% RVSL,15k RCSL,15k R1 21.5k 1%
1533 TA01
+
CIN 4.7F CT 3300pF
14 11 3 4 5 SHDN DUTY SYNC CT RT VIN
L2** 100H DS2 1N4148
B
L3** 100H
A
12V 200mA C4 47F
A 100V/DIV B 5mV/DIV
+
C3 47F
+
RT, 18k 6
* COILTRONICS CTX02-13716-X1 ** COILTRONICS CTX100-3 NOTE1: 25nH TRACE INDUCTANCE OR COILCRAFT B10T
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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12V Output Noise (BW = 100MHz)
<60VP-P
50ns/DIV
1533 TA02
1
LT1533
(Note 1)
Input Voltage (VIN) .................................................. 30V Switch Voltage (COL A, COL B) ............................... 30V SHDN Pin Voltage .................................................... 30V Feedback Pin Current............................................ 10mA Negative Feedback Pin Current ............................ 10mA Storage Temperature Range ................. - 65C to 150C Operating Ambient Temperature Range ....... 0C to 70C Operating Junction Temperature Range (Note 2) ................................................. 0C to 125C Lead Temperature (Soldering, 10 sec.)................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW NC 1 COL A 2 DUTY 3 SYNC 4 CT 5 RT 6 FB 7 NFB 8 16 PGND 15 COL B 14 VIN 13 RVSL 12 RCSL 11 SHDN 10 VC 9 GND
ORDER PART NUMBER LT1533CS
S PACKAGE 16-LEAD NARROW PLASTIC SO
TJMAX = 125C, JA = 100C/ W
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
VIN = 5V, VC = 0.9V, VFB = VREF. COL A, COL B, SHDN, NFB, DUTY pins open, unless otherwise noted.
SYMBOL VREF IFB FBREG VNFR INFR NFBREG gm IESK IESRC VCLH VCLL AV PARAMETER Reference Voltage Feedback Input Current Reference Voltage Line Regulation Negative Feedback Reference Voltage Negative Feedback Input Current Negative Feedback Reference Voltage Line Regulation Error Amplifier Transconductance Error Amplifier Sink Current Error Amplifier Source Current Error Amplifier Clamp Voltage Error Amplifier Clamp Voltage Error Amplifier Voltage Gain CONDITIONS Measured at Feedback Pin
q
MIN 1.235 1.215
TYP 1.250 1.250 250 0.003
MAX 1.265 1.275 900 0.03 - 2.420
UNITS V V nA %/V V A
Error Amplifiers
VFB = VREF 2.7V VIN 23V Measured at Negative Feedback Pin with Feedback Pin Open VNFB = VNFR 2.7V VIN 23V IC = 50A
q q q q q
- 2.550 - 37
- 2.500 - 25 0.002
0.05 1900 2300 350 350
q
1100 700 120 120
1500 200 200 1.33 0.1
mho mho A A V V V/V
VFB = VREF + 150mV, VC = 0.9V, VSHDN = 1V VFB = VREF - 150mV, VC = 0.9V, VSHDN = 1V High Clamp, VFB = 1V Low Clamp, VFB = 1.5V
q q
180
250
2
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ABSOLUTE MAXIMUM RATINGS
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WW
W
%/V
LT1533
ELECTRICAL CHARACTERISTICS
VIN = 5V, VC = 0.9V, VFB = VREF. COL A, COL B, SHDN, NFB, DUTY pins open, unless otherwise noted.
SYMBOL f MAX f SYNC RSYNC VFBfs DCMAX tIBL BV RON ILIM(MAX) ILIMSC IIN/ISW VDUTYTH Slew Control VSLEWR VSLEWF ISLEWR ISLEWF VIN VIN(MIN) IVIN IVIN(OFF) VSHDNL ISHDN Output Voltage Slew Rising Edge Output Voltage Slew Falling Edge Output Current Slew Rising Edge Output Current Slew Falling Edge Recommended Operating Range Minimum Input Voltage Supply Current Shutdown Supply Current Shutdown Threshold Shutdown Input Current 2.7V VIN 23V, RVSL, RCSL, RT = 17k 2.7V VIN 23V, VSHDN = 0V 2.7V VIN 23V Either A or B, RVSL, RCSL = 17k Either A or B, RVSL, RCSL = 17k Either A or B, RVSL, RCSL = 17k Either A or B, RVSL, RCSL = 17k
q q q q q
PARAMETER Maximum Switch Frequency Synchronization Frequency Range SYNC Pin Input Resistance FB Pin Threshold for Frequency Shift Maximum Switch Duty Cycle Switch Current Limit Blanking Time Output Switch Breakdown Voltage Output Switch-On Resistance Switch Current Limit Duty Cycle = 30% Switch Current Limit Duty Cycle = 80% Supply Current Increase During Switch-On Time DUTY Pin Threshold
CONDITIONS
MIN
TYP 250
MAX
UNITS kHz
Oscillator and Sync fOSC = 250kHz 40 5% Reduction from Nominal DUTY Pin Open, RVSL = RCSL = 4.9k, fOSC = 25kHz DUTY Pin Grounded, Forced 50% Duty Cycle 2.7V VIN 23V ICOL A or ICOL B = 0.75A
q
375 0.4 44 45.5 50.0 200
q q
kHz k V % % ns V
Output Switches
25 1 0.8
30 0.5 0.85
A A
16 0.35 11 14.5 1.3 1.3 2.7 2.55 12 12 0.4 0.8 -2 23 2.7 18 30 1.2
mA/A
V/s V/s A/s A/s V V mA A V A
Supply and Protection
The q denotes specifications that apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: The LT1533 is designed to operate over the junction temperature range of - 4 0C to 125C, but is neither tested nor guaranteed beyond 0C to 100C.
3
LT1533 TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage vs Temperature
2.70
0 -50
2.65
INPUT VOLTAGE (V)
SWITCH VOLTAGE (V)
ILIM (A)
2.60
2.55
2.50
2.45 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
1533 G01
Feedback Voltage and Input Current
1.30 1.29 1.28 FEEDBACK VOLTAGE (V) 1.27 1.26 1.25 1.24 1.23 1.22 1.21 1.20 -50 -25 0 400 350 FEEDBACK INPUT CURRENT (nA) 300 250 200 150 100 50 0 -50 -100 25 50 75 100 125 150 TEMPERATURE (C)
1533 G04
INPUT VOLTAGE (V)
Switching Frequency vs Feedback Pin Voltage
100
SWITCHING FREQUENCY (% TYPICAL)
90
ERROR AMPLIFIER OUTPUT (A)
80 70 60 50 40 30 20 10 0 0 0.1 0.3 0.4 0.5 0.2 FEEDBACK PIN VOLTAGE (V) 0.6
1533 G06
4
UW
Change in ILIM vs DC
0.7 0.6
25C 125C
Switch Voltage Drop
125C
-100 -150 -200 -250 -300
0.5 0.4 0.3 0.2 0.1 0 85C 25C
0
20
40 60 DUTY CYCLE (%)
80
100
1533 G02
0
0.2
0.4 0.8 0.6 SWITCH CURRENT (A)
1.0
1533 G03
Negative Feedback Voltage and Input Current
-2.40 35
-2.45
30
IINPUT CURRENT (A)
-2.50
25
-2.55
20
-2.60 -50 -25
0
15 25 50 75 100 125 150 TEMPERATURE (C)
1533 G05
Error Amplifier Output Current
500 400 300 200 100 0 -100 -200 -300 -400 -500 0.85 1.05 1.45 1.25 FEEDBACK PIN (V) 1.65
1533 G07
LT1533
PIN FUNCTIONS
COL A, COL B (Pins 2, 15): These are the output collectors of the power switches. Their emitters return to PGND through a common sense resistor. COL A and COL B are alternately turned on out of phase. Large currents flow into these pins so it is desirable to keep external trace lengths short to minimize radiation. The collectors can be tied together for simple boost applications. DUTY (Pin 3): Tying the DUTY pin to ground will force the outputs to switch with a 50% duty cycle. The DUTY pin must float if not used. SYNC (Pin 4): The SYNC pin can be used to synchronize the oscillator to an external clock (see Oscillator Sync in Applications Information section for more details). The SYNC pin may either be floated or tied to ground if not used. CT (Pin 5): The oscillator capacitor pin is used in conjunction with RT to set the oscillator frequency. For RT = 16.9k, CT(NF) = 129/fOSC(kHz) RT (Pin 6): The oscillator resistor pin is used to set the charge and discharge currents of the oscillator capacitor. The nominal value is 16.9k. It is possible to adjust this resistance 25% to get a more accurate oscillator frequency. FB (Pin 7): The feedback pin is used for positive voltage sensing and oscillator frequency shifting during start-up and short-circuit conditions. It is the inverting input to the error amplifier. The noninverting input of this amplifier connects internally to a 1.25V reference. This pin should be left open if not used. NFB (Pin 8): The negative feedback pin is used for sensing a negative output voltage. The pin is connected to the inverting input of the negative feedback amplifier through a 100k source resistor. The negative feedback amplifier provides a gain of - 0.5 to the feedback amplifier. This pin should be left open if not used. GND (Pin 9): Signal Ground. The internal error amplifier, negative feedback amplifier, oscillator, slew control circuitry and the bandgap reference are referred to this ground. Keep the connection to the feedback divider and VC compensation network free of large ground currents. VC (Pin 10): The compensation pin is used for frequency compensation and current limiting. It is the output of the error amplifier and the input of the current comparator. Loop frequency compensation can be performed with an RC network connected from the VC pin to ground. SHDN (Pin 11): The shutdown pin is used for disabling the switcher. Grounding this pin will disable all internal circuitry. Normally this output can be tied high (to VIN) or may be left floating. RCSL (Pin 12): A resistor to ground sets the current slew rate for the collectors A and B. The minimum resistor value is 3.9k and the maximum value is 68k. Current slew will be approximately: ISLEW(A/s) = 33/RCSL(k) RVSL (Pin 13): A resistor to ground sets the voltage slew rate for the collectors A and B. The minimum resistor value is 3.9k and the maximum value is 68k. Voltage slew will be approximately: VSLEW(V/s) = 220/RVSL(k) VIN (Pin 14): Input Supply Pin. Bypass this pin with a 4.7F low ESR capacitor. When VIN is below 2.55V the part will go into undervoltage lockout where it will stop output switching and pull the VC pin low. PGND (Pin 16): Power Switch Ground. This ground comes from the emitters of the power switches. In normal operation this pin should have approximately 25nH inductance to ground. This can be done by trace inductance (approximately 1") or with wire or a specific inductive component (e.g., small ferrite bead). This inductance ensures stability in the current slew control loop during turn-off. Too much inductance (>50nH) may produce oscillation on the output voltage slew edges.
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LT1533
BLOCK DIAGRA
VC LDO REGULATOR
+ -
NFB NEGATIVE FEEDBACK AMP INTERNAL VCC
FB
+
1.25V
RT OSCILLATOR CT SYNC T FF BK GND DUTY
1533 BD
OPERATIO
In noise sensitive applications, switching regulators tend to be ruled out as a power supply option due to their propensity for generating unwanted noise. When switching supplies are required due to efficiency or input/output voltage constraints, great pains must be taken to work around the noise generated by a typical supply. These steps may include precise synchronization of the power supply oscillator to an external clock, synchronizing the rest of the circuit to the power supply oscillator, or halting power supply switching during noise sensitive operations. The LT1533 greatly simplifies the task of eliminating supply noise by enabling the design of an inherently low noise switching regulator power supply. The LT1533 is a fixed frequency, current mode switching regulator with unique circuitry to control the voltage and current slew rates of the output switches. Slew control capability provides much greater control over power sup-
6
+
gm ERROR AMP
-
+
-
W
SHDN VIN PGND COL A COL B
+ -
OUTPUT DRIVERS
RVSL SLEW CONTROL COMP RCSL
S FF R
Q
Q
QB
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ply components that can create conducted and radiated electromagnetic interference. The current mode control provides excellent AC and DC line regulation and simplifies loop compensation. Current Mode Control A switching cycle begins with an oscillator discharge pulse which resets the RS flip-flop, turning on one of the output drivers (refer to Block Diagram). The switch current is sensed across an internal resistor and the resulting voltage is amplified and compared to the output of the error amplifier (VC pin). The driver is turned off once the output of the current sense amplifier exceeds the voltage on the VC pin. The toggle flip-flop ensures that the two output drivers are enabled on alternate clock cycles. Internal slope compensation is provided to ensure stability under high duty cycle conditions.
LT1533
OPERATIO
Output regulation is obtained using the error amp to set the switch current trip point. The error amp is a transconductance amplifier that integrates the difference between the feedback output voltage and an internal 1.25V reference. The output of the error amp adjusts the switch current trip point to provide the required load current at the desired regulated output voltage. This method of controlling current rather than voltage provides faster input transient response, cycle by cycle current limiting for better output switch protection and greater ease in compensating the feedback loop. The VC pin serves three different purposes. It is used for loop compensation, current limit adjustment and soft starting. During normal operation the VC voltage will be between 0.2V and 1.33V. An external clamp may be used for lowering the current limit. A capacitor coupled to an external clamp can be used for soft starting. The negative feedback amplifier allows for direct regulation of negative output voltages. The voltage on the NFB pin gets amplified by a gain of - 0.5 and driven onto the FB input, i.e., the NFB pin regulates to - 2.5V while the amplifier output internally drives the FB pin to 1.25V as in normal operation. The negative feedback amplifier input impedance is 100k (typ) referred to ground. Slew Control Control of output voltage and current slew rates is done via two feedback loops. One loop controls the output switch collector voltage dV/dt and the other loop controls the emitter current dI/dt. Output slew control is achieved by comparing the currents generated by these two slewing events to currents created by external resistors RVSL and
APPLICATIONS INFORMATION
Reducing EMI from switching power supplies has traditionally invoked fear in designers. Many switchers are designed solely on efficiency and as such produce waveforms filled with high frequency harmonics that then propagate through the rest of the power supply. The LT1533 provides control over two of the more important variables for controlling EMI with switching inductive loads: switch voltage slew rate and switch current slew rate. The use of this part will reduce noise and EMI over conventional switch mode controllers. Because these variables are under control, a supply built with this part will exhibit far less tendency to create EMI and less chance of wandering into problems during production.
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RCSL. The two control loops are combined internally to provide a smooth transition from current slew control to voltage slew control. Internal Regulator Most of the control circuitry operates from an internal 2.4V low dropout regulator that is powered from VIN. The internal low dropout design allows VIN to vary from 2.7V to 23V with virtually no change in device performance. When the part is put into shutdown, the internal regulator is turned off, leaving only a small (12A typ) current drain from VIN. Protection Features There are three modes of protection in the LT1533. The first is overcurrent limit. This is achieved via the clamping action of the VC pin. The second is thermal shutdown that disables both output drivers and pulls the VC pin low in the event of excessive chip temperature. The third is undervoltage lockout that also disables both outputs and pulls the VC pin low whenever VIN drops below 2.5V. 50% Duty Cycle Mode Since the LT1533 has dual out-of-phase outputs, it is ideal for driving push-pull transformers. For simple DC transformer applications, the part can be forced into a 50% duty cycle mode using the DUTY pin. Grounding the DUTY pin will override the internal control circuitry and force the outputs to switch with a 50% duty cycle at one-half the oscillator frequency. Slew control also applies in the 50% duty cycle mode.
7
LT1533
APPLICATIONS INFORMATION
It is beyond the scope of this data sheet to get into EMI fundamentals. However, following some basic guidelines will greatly mitigate EMI generation in switching regulator circuits. 1. Use switcher topologies that have better EMI characteristics. This will typically entail keeping current continuous and avoiding fast switch nodes. For instance, push-pull designs will tend to produce lower conducted emissions. 2. Discern whether conducted emissions or radiated emissions (or both) are the problem. Understanding this can help determine whether noise problems are magnetic or electrostatic. 3. Construct magnetics to lessen radiation; for instance, avoid open core magnetics. Magnetic components built on rods or barrels do not provide close magnetic return paths for flux and as such can induce problems on nearby sensitive circuits. Torroids and E cores are preferred embodiments. 4. Select capacitors for optimal ESR. Many problems are the result of voltage-induced transients in the ESR of the capacitors. 5. Use careful board layout. Trace-to-trace coupling of high current lines or capacitive coupling of lines with high dV/dt can be a problem. The area of current loops with high current components should also be minimized. The following general example illustrates the benefits of slew control: the harmonics of a square wave will roll off from the fundamental at a 1/f rate. If the edges of the square wave are slew limited, an additional 1/f rolloff occurs at a frequency of 1/tSLEW, where tSLEW is the transition time for the slew period. This is the basis for providing improved noise performance with the LT1533. Oscillator Frequency The oscillator determines the switching frequency and therefore the fundamental positioning of all harmonics. The use of good quality external components is important to ensure oscillator frequency stability. The oscillator is a sawtooth design. A current defined by external resistor RT is used to charge and discharge the capacitor CT. The discharge rate is approximately ten times the charge rate. By allowing the user to have control over both components, trimming of oscillator frequency can be more easily achieved. The external capacitance CT is chosen by: CT(nF) = 2180/[fOSC(kHz) * RT(k)] where fOSC is the desired oscillator frequency in kHz. For RT equal to 16.9k, this simplifies to: CT(nF) = 129/fOSC(kHz) A good quality low TC capacitor should be chosen. Nominally RT should be 16.9k. Since it sets up current, its temperature coefficient should be selected to compliment the capacitor. Ideally, both should have low temperature coefficients. It is possible to kit RT and CT for lower oscillator frequency production tolerance. When the DUTY pin is high or floating, the outputs will be turned off during the discharge time of the oscillator. Due to slew rate control, turning off the outputs does not produce immediate transitions. Turn-off will require the current to ramp down and the switch voltage to ramp up. If the DUTY pin is grounded, then the outputs will turn on or off starting with the clock discharge. If the FB pin is below 0.4V the oscillator discharge time will increase, causing the oscillation frequency to increase to approximately 6:1. This feature helps minimize power dissipation during start-up and short-circuit conditions. Oscillator frequency is important for noise reduction in two ways: 1) the lower the oscillator frequency the lower the harmonics of waveforms are, making it easier to filter them, 2) the oscillator will control the placement of output frequency harmonics which can aid in specific problems where you might be trying to avoid a certain frequency bandwidth that is used for detection elsewhere. Oscillator Sync If a more precise frequency is desired (e.g., to accurately place harmonics) the oscillator can be synchronized to an external clock. Set the RC timing components for an oscillator frequency 10% lower than the desired sync frequency.
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LT1533
APPLICATIONS INFORMATION
Drive the SYNC pin with a square wave (with greater than 1.4V amplitude). The rising edge of the sync square wave will initiate clock discharge. The sync pulse should have a minimum of 0.5s pulse width. Be careful in sync'ing to frequencies much different from the part since the internal oscillator charge slope determines slope compensation. It would be possible to get into subharmonic oscillation if the sync doesn't allow for the charge cycle of the capacitor to initiate slope compensation. In general, this will not be a problem until the sync frequency is greater than 1.5 times the oscillator free-run frequency. Slew Rate Setting Setting the voltage and current slew rates is easy. External resistors to ground on the RVSL and RCSL pins determine the slew rates. Determining what slew rate to use is more difficult. There are several ways to approach the problem. First start by putting a 50k resistor pot with a 3.9k series resistance on each pin. In general, the next step will be to monitor the noise that you are concerned with. Be careful in measurement technique. Keep probe ground leads very short. Usually it will be desirable to keep the voltage and current slew resistors approximately the same. There are circumstances where a better optimization can be found by adjusting each separately, but as these values are separated further, a loss of independence of control will occur. Starting from the lowest resistor setting adjust the pots until the noise level meets your guidelines. Note that slower slewing waveforms will dissipate more power so that efficiency will drop. You can also monitor this as you make your slew adjustment. It is possible to use a single slew setting resistor. In this case the RVSL and RCSL pins are tied together. A resistor with a value of 2k to 34k (one half the individual resistors) can then be tied from these pins to ground. Emitter Inductance A small inductance in the power ground minimizes a potential dip in the output current falling edge that can occur under fast slewing, 25nH is usually sufficient. Greater than 50nH may produce unwanted oscillations in the voltage output. The inductance can be created by wire or board trace with the equivalent of one inch of straight length. A spiral board trace will require less length. Positive Output Voltage Setting Sensing of a positive output voltage is usually done using a resistor divider from the output to the FB pin. The positive input to the error amp is connected internally to a 1.25V bandgap reference. The FB pin will regulate to this voltage.
R1 FB PIN R2
1533 F01
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VOUT
Figure 1
Referring to Figure 1, R1 is determined by:
V R1 = R2 OUT - 1 1.25
The FB bias current represents a small error and can usually be ignored for values of R1|| R2 up to 10k. One word of caution. Sometimes a feedback zero is added to the control loop by placing a capacitor across R1 above. If the feedback zero capacitively pulls the FB pin above the internal regulator voltage (2.4V typ), output regulation may be disrupted. A series resistance with the feedback pin can eliminate this potential problem. Negative Output Voltage Setting Negative output voltage can be sensed using the NFB pin. In this case regulation will occur when the NFB pin is at - 2.5V. The input bias current for the NFB is -25A (INFB) which needs to be accounted for in setting up the divider. Referring to Figure 2, R1 is chosen such that:
VOUT - 2.5 R1 = R2 2.5 + R2 * 25A
9
LT1533
APPLICATIONS INFORMATION
R1 NFB PIN INFB R2
1533 F02
-VOUT
Figure 2
A suggested value for R2 is 2.5k. The NFB pin is normally left open if the FB pin is being used. Dual Polarity Output Voltage Sensing Certain applications may benefit from sensing both positive and negative output voltages. When doing this each output voltage resistor divider is individually set as previously described. When both FB and NFB pins are used, the LT1533 will act to prevent either output from going beyond its set output voltage. The lowest output (heaviest load) will dominate control of the regulator. This technique would prevent either output from going unregulated high at no load. However, this technique will also compromise output load regulation. Shutdown If the shutdown pin is pulled low, the regulator will turn off. The supply current will be reduced to less than 20A. Thermal Considerations Computing power dissipation for this IC requires careful attention to detail. Reduced output slewing causes the part to dissipate more power than would occur with fast edges. However, much improvement in noise can be produced with modest decrease in supply efficiency. Power dissipation is a function of topology, input voltage, switch current and slew rates. It is impractical to come up with an all-encompassing formula. It is therefore recommended that package temperature be measured in each application. The part has an internal thermal shutdown to prevent device destruction, but this should not replace careful thermal design. 1. Dissipation due to input current:
I PVIN = VIN11mA + 60
10
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where I is the average switch current. 2. Dissipation due to the drivers saturation: PVSAT = (VSAT)(I)(DCMAX) where VSAT is the output saturation voltage which is approximately 0.1 + (0.4)(I), DCMAX is the maximum duty cycle. 3. Dissipation due to output slew using approximations for slew rates:
2 2 2V V I2 + I I VIN - SAT IN 4 4 PSLEW = RCSL + RVSL fOSC 9 220 109 33 10
()
()
()
()
()
(
)( )
Note if VSAT and I are small with respect to VIN and I, then:
VIN R VSL I RCSL PSLEW = fOSC VIN I + 9 9 33 10 220 10
()( ) ( )( () ()
) ( )( )()
where I is the ripple current in the switch, RCSL and RVSL are the slew resistors and fOSC is the oscillator frequency. Power dissipation PD is the sum of these three terms. Die junction temperature is then computed as: TJ = TAMB + (PD)(JA) where TAMB is ambient temperature and JA is the package thermal resistance. For the 16-pin SO JA is 100C/W. For example, with fOSC = 40kHz, 0.4A average current and 0.1A of ripple, the maximum duty cycle is 90%. Assume slew resistors are both 17k and VSAT is 0.26V, then: PD = 0.176W + 0.094W + 0.158W = 0.429W In an S16 package the die junction temperature would be 43C above ambient.
LT1533
APPLICATIONS INFORMATION
Frequency Compensation Loop frequency compensation is accomplished by way of a series RC network on the output of the error amplifier (VC pin). Referring to Figure 3, the main pole is formed by capacitor CVC and the output impedance of the error amplifier (approximately 400k). The series resistor RVC creates a "zero" which improves loop stability and transient response. A second capacitor CVC2, typically onetenth the size of the main compensation capacitor, is sometimes used to reduce the switching frequency ripple on the VC pin. VC pin ripple is caused by output voltage ripple attenuated by the output divider and multiplied by the error amplifier. With the second capacitor, VC pin ripple is: As such its design is based on being able to supply the voltage and current and ensure that saturation doesn't occur.
T1 1:N VIN Q1A Q1B
1533 F04
(1. 25)(VRIPPLE)(gm)(RVC) VCPIN RIPPLE =
VOUT
where VRIPPLE = Output ripple (VP-P) gm = Error amplifier transconductance RC = Series resistor on VC pin VOUT = DC output voltage
RVC 2k CVC 0.01F VC PIN CVC2 4.7nF
1533 F03
Figure 3
To prevent irregular switching, VC pin ripple should be kept below 50mVP-P. Worst-case VC pin ripple occurs at maximum output load current and will also be increased if poor quality (high ESR) output capacitors are used. The addition of a 0.0047F capacitor on the VC pin reduces switching frequency ripple to only a few millivolts. A low value for RC will also reduce VC pin ripple, but loop phase margin may be inadequate. Magnetics Design of magnetics is again dependent on topology. For a push-pull converter the transformer stores little energy.
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DS1
VSEC
LO
+
DS2 CO
VOUT
Figure 4
For the configuration of Figure 4 the following design equations apply: N is determined by volt-sec balance in the transformer.
N=
VOUT + VF DCMAX VIN MIN - VSAT
()
where VIN(MIN) is the minimum input voltage, DCMAX is the maximum duty cycle, VF is the diode forward drop and VSAT is the driver on voltage. LO is determined by desired ripple current and oscillator frequency:
LO =
(VOUT + VF)(1- DCMIN) (IRIPPLE)(fOSC)
where DCMIN is the duty cycle at maximum input, IRIPPLE is the desired ripple current and fOSC is the oscillator frequency. As an example, a 5V 10% to 12V, 150kHz converter with 200mA output and 40mA ripple will require: N= 12 + 0.4
90% 4.5 - 0.5
LO =
(12 + 0.4)(1- 71%) = 600H (40mA)(150k)
(
)
= 3.5,
11
LT1533
APPLICATIONS INFORMATION
The transformer needs to be designed such that the primary inductance is five to ten times greater than the reflected LO inductance (LO/N2) which is 49H in this case. The transformer must also have a volt-sec rating greater than: VIN - VSAT DCMAX fOSC Input Capacitor The input capacitor is an important component in the design of a low noise switcher. The ESR of this capacitor acts with high frequency current components to produce much of the conducted noise of the switcher. It is possible that the input capacitor will see a large surge current when certain loads are connected (for instance, batteries or large capacitors). Solid tantalum capacitors can fail under these conditions. Value of 1F to 22F are recommended with ESR under 0.3. Output Filter Capacitor Output capacitors are usually chosen on the basis of ESR since this will determine output ripple. Typical required ESR will be in the 0.05 to 0.5 range. The specific value for capacitance will depend on topology. A typical output capacitor is an AVX type TPS, 22F and 25V with a guaranteed ESR less than 0.2. To further reduce ESR, multiple output capacitors can be used in parallel. The value in microfarads is not particularly important. A small 22F trantalum capacitor will have high ESR and higher output voltage ripple. Table 1 shows some typical solid tantalum surface mount capacitors.
Table 1
SIZE E CASE D CASE C CASE B CASE CAPACITOR AVX TPS, Sprague 593D AVX TAJ AVX TPS, Sprague 593D AVX TAJ AVX TPS AVX TAJ AVX TAJ ESR (MAX ) 0.1 to 0.3 0.7 to 0.9 0.1 to 0.3 0.9 to 2.0 0.2 (Typ) 1.8 to 3.0 2.5 to 10
(
)
which would be 24V-s in this case. Capacitors Correct choice of input and output capacitors can be very important to low noise switcher performance. Push-pull topologies and other low noise topologies will in general have continuous currents which reduce the requirements for capacitance. However, noise depends more on the ESR of the capacitors. Input capacitors must also withstand surges that occur during the switching of some types of loads. Some solid tantulum capacitors can fail under these surge conditions. Design Note 95 offers more information but the following is a brief summary of capacitor types and attributes. Aluminum Electrolytic: Low cost but rarely used above 100kHz. Solid Tantalum: Small size and low impedance. Typically available for voltages below 50V. Possible problem with surge currents (AVX TPS line addresses this issue). OS-CON: Lower impedance than aluminum but only available for 25V or less. Form factor may be a problem. Sometimes their very low ESR can cause loop stability problems. Ceramic: Generally used for high frequency and high voltage bypass. They too can have such a low ESR as to cause loop stability problems. Often they can resonate with their ESL before ESR becomes effective. A high frequencies most capacitors have inductive impedance that can be reduced by paralleling capacitors.
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U
W
U
U
Switching Diodes In general, switching diodes should be Schottky diodes such as 1N5818 or MBR130 (1A/30V). Low output current applications may use 1N4148 switching diodes.
LT1533
APPLICATIONS INFORMATION
5V 14 VIN COL A PGND 2 16 25nH* D1 BAT85 1 CIN 22F 10V D3 8 T1** 3.3 D4 C1 22F 35V D5 1 3.3 D6 1, 2, 7, 8 C2 22F 35V LT1121CS8 3 2 R4 150k R5 R6 150k 332k 5 4 3 1 R3 332k 12V 80mA C3 2.2F 25V
LT1533 3 SHDN 11 4 DUTY SHDN SYNC GND RT 96 COL B RCSL RVSL 15 12 13 4k TO 68k CT VC NFB FB 5 10 8 7 CT 3300pF RT R2 18k 10k R1 43k 5V 68k
Figure 5. 5V to 12V DC Transformer
Unregulated Applications The LT1533 can be used to create a low noise "DC transformer" unregulated power supply. DC transformers are open-loop switching regulators where the output voltage is controlled by the turns ratio of the transformer. A DC transformer provides a low cost isolated supply. For such applications, the DUTY pin of the LT1533 should be grounded. This will force the outputs into a 50% on, 50% off mode. Note that because of slew control there will be some variance from 50%. Figure 5 shows a 5V to 15V DC transformer. One concern with this type of application is having both switch outputs transition at the same time. This can cause both primary side windings to have positive EMF added to the winding, causing the current to run away. Since this part controls slew rate this won't happen. It is possible to see slightly increased total current draw when both drivers are on, but this will be controlled and observable. Since the outputs share a common sense resistor, the outputs will turn off when the total current in both exceeds the limit set by the VC pin.
U
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D2 BAT85
LT1175CS8 1N5819 x4
C4 2.2F 25V -12V 80mA
1533 F05
*BEAD OR PCB TRACE **COILTRONICS CTX02 13716-X1
The FB pin should be DC biased between 0.7V and 1.2V to prevent frequency shifting from occuring. This also ensures that the VC pin is set to its upper clamp, providing peak output current. The slew rate adjustment should be made by putting a 3.9k resistor in series with a 50k pot on the RVSL and RCSL pins (or a 2k resistor in series with a 25k pot with both pins tied together). Monitor output noise or other system signal while increasing the resistance until desired noise performance is reached. System efficiency can also be monitored. While this topology is not as quiet as a push-pull converter, it can provide a low cost, isolated power supply that has decreased noise relative to other solutions. More Help Our Application Department is always ready to lend a helping hand.
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LT1533
TYPICAL APPLICATION
3V to 5V Forward Push-Pull DC/DC Converter
3V
+
CIN 4.7F CT 1.3nF
11 3 4 5
SHDN DUTY SYNC CT RT VC GND 9
RT, 16.9k
6 10
CVC 0.01F
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14 VIN COL A COL B PGND LT1533 RVSL RCSL NFB 8 FB 2 15 NOTE 1 16 13 12 7 R2 2.49k 1% RVSL, 20k RCSL, 20k
T1 10 : 29
DS1 1N5819
LO* 300H DS2 1N5819
+
5V 250mA C1 47F
R1 7.5k 1%
1533 TA03
*COILTRONICS CTX300-3 NOTE 1: 25nH TRACE INDUCTANCE
LT1533
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted.
S Package 16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 - 0.394* (9.804 - 10.008) 16 15 14 13 12 11 10 9
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0 - 8 TYP 0.053 - 0.069 (1.346 - 1.752)
2
3
4
5
6
7
8
0.004 - 0.010 (0.101 - 0.254)
0.016 - 0.050 0.406 - 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
S16 0695
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LT1533 RELATED PARTS
PART NUMBER LT1129 LT1175 LT1377 LT1425 LTC(R)1436 DESCRIPTION 700mA Micropower Low Dropout Regulator 500mA Negative Low Dropout Micropower Regulator 1MHz High Efficiency 1.5A Switching Regulator Isolated Flyback Switching Regulator High Efficiency Synchronous Switching Regulator COMMENTS 0.4V Dropout Voltage, Reverse Battery Protection Positive or Negative Shutdown Logic High Frequency, Small Inductor Excellent Regulation Without Transformer "Third Winding" Adaptive PowerTM Mode, Phase Locked Loop
Adaptive Power is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 q (408) 432-1900 FAX: (408) 434-0507 q TELEX: 499-3977 q www.linear-tech.com
1533i LT/TP 0997 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1997

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